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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. advance information for pre-production products; subject to change without notice. 2n7001t sces888 ? may 2018 2n7001t single-bit dual-supply buffered voltage signal converter 1 1 features 1 ? up and down translation across 1.65 v to 3.6 v ? operating temperature: ? 40 c to +125 c ? maximum quiescent current (i cca + i ccb ) of 14 a (125 c maximum) ? up to 100 mbps support across the full supply range ? v cc isolation feature ? if either v cc input is below 100 mv, the output becomes high-impedance ? i off supports partial-power-down mode operation ? latch-up performance exceeds 100 ma per jesd 78, class ii ? esd protection exceeds jesd 22 ? 2000-v human body model ? 1000-v charged-device model 2 applications ? mcu/fpga/processor gpio translation ? communications modules to processor translation ? push-pull i/o buffering 3 description the 2n7001t is a single-bit buffered voltage signal converter that uses two separate configurable power- supply rails to up or down translate a unidirectional signal. the device is operational with both v cca and v ccb supplies down to 1.65 v and up to 3.60 v. v cca defines the input threshold voltage on the a input. v ccb defines the output drive voltage on the b output. this device is fully specified for partial-power-down applications using the i off current. the i off protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined i/o that is biased to a specific voltage while the device is powered down. the v cc isolation feature ensures that if either v cca or v ccb is less than 100 mv, the output port (b) enters a high-impedance state. device information (1) part number package body size (nom) 2n7001tdck sc70 (5) 2.00 mm 1.25 mm 2n7001tdpw x2son (5) 0.80 mm 0.80 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. block diagram and pin configuration v ccb v cca gnd 2n7001t a b b v cca v ccb gnd a 1 2 3 5 4 v cca v ccb b gnd a dpw package dck package 1 2 3 4 5 esd esd advance information tools & software technical documents ordernow productfolder support &community
2 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 4 6.1 absolute maximum ratings ...................................... 4 6.2 esd ratings .............................................................. 4 6.3 recommended operating conditions ....................... 5 6.4 thermal information .................................................. 5 6.5 electrical characteristics ........................................... 6 6.6 switching characteristics .......................................... 6 6.7 operating characteristics .......................................... 6 6.8 typical characteristics .............................................. 7 7 parameter measurement information .................. 8 7.1 load circuit and voltage waveforms ....................... 8 8 detailed description .............................................. 9 8.1 overview ................................................................... 9 8.2 functional block diagram ......................................... 9 8.3 feature description ................................................... 9 8.4 device functional modes ........................................ 10 9 application and implementation ........................ 11 9.1 application information ............................................ 11 9.2 typical applications ................................................ 11 10 power supply recommendations ..................... 13 11 layout ................................................................... 13 11.1 layout guidelines ................................................. 13 11.2 layout example .................................................... 13 12 device and documentation support ................. 14 12.1 documentation support ....................................... 14 12.2 receiving notification of documentation updates 14 12.3 community resources .......................................... 14 12.4 trademarks ........................................................... 14 12.5 electrostatic discharge caution ............................ 14 12.6 glossary ................................................................ 14 13 mechanical, packaging, and orderable information ........................................................... 14 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. date revision notes may 2018 * advanced information advance information
3 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 5 pin configuration and functions dck package 5-pin sc70 top view dpw package 5-pin x2son transparent top view pin functions pin type description name dck dpw a 4 1 i data input. this pin is referenced to v cca . b 1 4 o data output. this pin is referenced to v ccb . v cca 5 5 ? input supply voltage. 1.65v v cca 3.6 v. v ccb 2 2 ? output supply voltage. 1.65v v cca 3.6 v. gnd 3 3 ? ground advance information v cca v ccb b gnd a b v cca v ccb gnd a 1 2 3 5 4
4 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated (1) stresses beyond those listed under the absolute maximum ratings table may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) the output positive-voltage rating may be exceeded up to 4.2 v maximum if the output current ratings are observed. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cca supply voltage, a port ? 0.5 4.2 v v ccb supply voltage, b port ? 0.5 4.2 v v i input voltage (2) ? 0.5 4.2 v v o voltage applied to the output in the high-impedance or power-off state (2) ? 0.5 4.2 v v o voltage applied to the output in the high or low state (2) (3) ? 0.5 v ccb + 0.2 v i ik input clamp current v i < 0 ? 50 ma i ok output clamp current v o < 0 ? 50 ma i o continuous output current ? 50 50 ma i o continuous current through v ccb or gnd ? 50 50 ma i o continuous current through v cca ? 10 10 ma t j operating junction temperature ? 40 150 c t stg storage temperature ? 65 150 c (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm), per ansi/esda/jedec js-001 (1) 2000 v charged-device model (cdm), per jedec specification jesd22-c101 (2) 1000 advance information
5 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min max unit v cca supply voltage, v cca 1.65 3.6 v v ccb supply voltage, v ccb 1.65 3.6 v v ih high-level input voltage v cca = 1.65 v - 1.95 v v cca * 0.65 v v cca = 2.30 v - 2.70 v 1.60 v cca = 3.00 v - 3.60 v 2.00 v il low-level input voltage v cca = 1.65 v - 1.95 v v cca * 0.65 v v cca = 2.30 v - 2.70 v 0.70 v cca = 3.00 v - 3.60 v 0.80 v i input voltage 0 3.6 v v o output voltage active state 0 v ccb v tri-state 0 3.6 t/ v input transition rise or fall rate 100 ns/v t a operating free-air temperature ? 40 125 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information thermal metric (1) 2n7001t unit dck (sc70) dpw (x2son) 5 pins 5 pins r ja junction-to-ambient thermal resistance 253.5 462.7 c/w r jc(top) junction-to-case (top) thermal resistance 162.6 227.7 c/w r jb junction-to-board thermal resistance 140.6 326.5 c/w jt junction-to-top characterization parameter 69.8 33.8 c/w jb junction-to-board characterization parameter 139.7 325.1 c/w advance information
6 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated (1) all typical values are for t a = 25 c 6.5 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cca v ccb min typ (1) max unit v oh high-level output voltage v i = v ih i oh = ? 100 a 1.65 v - 3.6 v 1.65 v - 3.6 v v ccb - 0.1 v i oh = ? 8 ma 1.65 v 1.65 v 1.2 i oh = ? 9 ma 2.3 v 2.3 v 1.75 i oh = ? 12 ma 3 v 3 v 2.3 v ol low-level output voltage v i = v il i ol = 100 a 1.65 v - 3.6 v 1.65 v - 3.6 v 0.1 v i ol = 8 ma 1.65 v 1.65 v 0.45 i ol = 9 ma 2.3 v 2.3 v 0.55 i ol = 12 ma 3 v 3 v 0.7 i off partial power down current v i or v o = 0 v - 3.6 v 0 v 0 v - 3.6 v ? 8 8 a v i or v o = 0 v - 3.6 v 0 v - 3.6 v 0 v ? 8 8 i cca v cca supply current v i = v cca or gnd, i o = 0 ma 1.65 v - 3.6 v 1.65 v - 3.6 v 8 a 0 v 3.6 v ? 8 3.6 v 0 v 8 i ccb v ccb supply current v i = v cci or gnd, i o = 0 ma 1.65 v - 3.6 v 1.65 v - 3.6 v 8 a 0 v 3.6 v 8 3.6 v 0 v ? 8 i cca + i ccb combined supply current v i = v cci or gnd, i o = 0 ma 1.65 v - 3.6 v 1.65 v - 3.6 v 14 a c i input capacitance v i = 1.65 v dc + 1mhz -16 dbm sine wave 3.3 v 0 v 2 pf c o output capacitance v i = 1.65 v dc + 1mhz -16 dbm sine wave 0 v 3.3 v 4 pf 6.6 switching characteristics over operating free-air temperature range (unless otherwise noted) parameter test conditions min max unit t pd propagation delay v cca = 1.80 0.15 v v ccb = 1.80 0.15 v 0.5 20 ns v ccb = 2.50 0.20 v 0.5 17 v ccb = 3.30 0.30 v 0.5 14 v cca = 2.50 0.20 v v ccb = 1.80 0.15 v 0.5 18 v ccb = 2.50 0.20 v 0.5 15 v ccb = 3.30 0.30 v 0.5 12 v cca = 3.30 0.30 v v ccb = 1.80 0.15 v 0.5 16 v ccb = 2.50 0.20 v 0.5 13 v ccb = 3.30 0.30 v 0.5 10 6.7 operating characteristics t a = 25 c parameter test conditions min typ max unit c pda power dissipation capacitance - port a i o = 0 ma c l = 0 pf, f = 1 mhz, t r = t f = 1 ns v cca = v ccb = 1.8 v 1 pf v cca = v ccb = 2.5 v 1.3 v cca = v ccb = 3.3 v 1.8 c pdb power dissipation capacitance - b port i o = 0 ma c l = 0 pf, f = 1 mhz, t r = t f = 1 ns v cca = v ccb = 1.8 v 12 pf v cca = v ccb = 2.5 v 15 v cca = v ccb = 3.3 v 18 advance information
7 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 6.8 typical characteristics figure 1. v oh vs i oh , 1.8 v figure 2. v ol vs i ol , 1.8 v figure 3. v oh vs i oh , 2.5 v figure 4. v ol vs i ol , 2.5 v figure 5. v oh vs i oh , 3.3 v figure 6. v ol vs i ol , 3.3 v output high current (i oh ) [ma] output high voltage (v oh ) [v] output high voltage (v oh ) vs. output high current (i oh ) v cca = v ccb = 1.8 v, t a = 25 q c -8 -7 -6 -5 -4 -3 -2 -1 0 1.45 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85 voh1 output low current (i ol ) [ma] output low voltage (v ol ) [v] output low voltage (v ol ) vs. output low current (i ol ) v cca = v ccb = 1.8v, t a = 25 q c 0 1 2 3 4 5 6 7 8 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 vol1 output low current (i ol ) [ma] output low voltage (v ol ) [v] output low voltage (v ol ) vs. output low current (i ol ) v cca = v ccb = 2.5v, t a = 25 q c 0 1 2 3 4 5 6 7 8 9 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 vol2 output high current (i oh ) [ma] output high voltage (v oh ) [v] output high voltage (v oh ) vs. output high current (i oh ) v cca = v ccb = 2.5v, t a = 25 q c -9 -8 -7 -6 -5 -4 -3 -2 -1 0 2.15 2.2 2.25 2.3 2.35 2.4 2.45 2.5 2.55 voh2 output high current (i oh ) [ma] output high voltage (v oh ) [v] output high voltage (v oh ) vs. output high current (i oh ) v cca = v ccb = 3.3v, t a = 25 q c -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 2.85 2.9 2.95 3 3.05 3.1 3.15 3.2 3.25 3.3 3.35 voh3 advance information output low current (i ol ) [ma] output low voltage (v ol ) [v] output low voltage (v ol ) vs. output low current (i ol ) v cca = v ccb = 3.3v, ta = 25 q c 0 1 2 3 4 5 6 7 8 9 10 11 12 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 vol3
8 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 7 parameter measurement information 7.1 load circuit and voltage waveforms unless otherwise noted, all input pulses are supplied by generators having the following characteristics: ? f = 1 mhz ? z o = 50 ? dv/dt 1 ns/v (1) c l includes probe and jig capacitance. figure 7. load circuit table 1. load circuit conditions parameter v cc r l c l t pd propagation (delay) time 1.65 v ? 3.6 v 2 k 15 pf (1) v cci is the supply pin associated with the input port. (2) v oh and v ol are typical output voltage levels that occur with specified r l and c l . figure 8. propagation delay advance information output pin under test c l (1) r l measurement point input a v cca v cca / 2 0 v output b v oh (2) v ol (2) t pd t pd v cca / 2 v ccb / 2 v ccb / 2
9 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 8 detailed description 8.1 overview the 2n7001t is a single-bit dual-supply buffered voltage signal converter that can be used to up or down- translate a single unidirectional signal. the device is operational with both v cca and v ccb supplies down to 1.65 v and up to 3.60 v. v cca defines the input threshold voltage on the a input while v ccb defines the output voltage on the b output. 8.2 functional block diagram 8.3 feature description 8.3.1 up-translation or down-translation from 1.65 v to 3.60 v the v cca and v ccb pins can both be supplied by a voltage range from 1.65 v to 3.6 v. this voltage range makes the device suitable for translating between any of the voltage nodes (1.8 v, 2.5 v, and 3.3 v). 8.3.2 balanced cmos push-pull outputs a balanced output allows the device to sink and source similar currents. the drive capability of this device may create fast edges into light loads, so routing and load conditions should be considered to prevent ringing. additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. it is important for the output power of the device to be limited to avoid damage due to over- current. the electrical and thermal limits defined the in the absolute maximum raings must be followed at all times. 8.3.3 standard cmos inputs standard cmos inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance shown in the electrical characteristics . the worst case resistance is calculated with the maximum input voltage, shown in the absolute maximum ratings , and the maximum input leakage current, shown in the electrical characteristics , using ohm's law (r = v i). signals applied to the inputs need to have fast edge rates, as defined by t/ v in the recommended operating conditions to avoid excessive current consumption and oscillations. if a slow or noisy input signal is required, a device with a schmitt-trigger input should be used to condition the input signal prior to the standard cmos input. advance information v ccb v cca gnd 2n7001t a b esd esd
10 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated feature description (continued) 8.3.4 negative clamping diodes the inputs and outputs to this device have negative clamping diodes as shown in figure 9 . caution voltages beyond the values specified in the absolute maximum ratings table can cause damage to the device. the input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. figure 9. electrical placement of clamping diodes for each input and output 8.3.5 partial power down (i off ) the inputs and outputs for this device enter a high-impedance state when the supply voltage is 0 v. the maximum leakage into or out of any input pin or output pin on the device is specified by i off in the electrical characteristics . 8.3.6 over-voltage tolerant inputs input signals to this device can be driven above the input supply voltage (v cca ), as long as they remain below the maximum input voltage value specified in the recommended operating conditions . 8.4 device functional modes table 2 lists the functional modes of the 2n7001t device. table 2. function table input output l (referenced to v cca ) l (referenced to v ccb ) h (referenced to v cca ) h (referenced to v ccb ) gnd logic input output v cc device -i ik -i ok advance information
11 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 application information the 2n7001t device can be used in level-translation applications for interfacing between devices or systems that are operating at different interface voltages. 9.2 typical applications 9.2.1 processor error up translation figure 10 shows an example of the 2n7001t being used in a unidirectional logic level-shifting application. figure 10. processor error up translation application 9.2.1.1 design requirements for this design example, use the parameters shown in table 3 . table 3. design parameters design parameter example value input voltage supply 1.8 v output voltage supply 3.3 v 9.2.1.2 detailed design procedure to begin the design process, determine the following: ? input voltage range ? the supply voltage of the upstream device (device that is driving input pin a) will determine the appropriate input voltage range. for a valid logic-high, the value must exceed the high-level input voltage (v ih ) of the input port. for a valid logic low the value must be less than the low-level input voltage (v il ) of the input port. ? output voltage range ? the supply voltage of the downstream device (device that output pin b is driving) will determine the appropriate output voltage range. advance information 3.3 v 1.8 v gnd 2n7001t a b esd esd processor proc err system controller proc err v cca v ccb
12 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 9.2.1.3 application curve figure 11. up translation (1.8 v to 3.3 v) at 1 mhz 9.2.2 discrete fet translation replacement the 2n7001t device is an excellent option for replacing discrete translators, as shown in figure 12 , and has the following benefits regarding discrete translation implementations: ? a single device vs a four component solution ? minimized implementation size ? lower power consumption ? v cc isolation feature ? higher data rates ? integrated esd protection ? improved glitch performance figure 12. discrete translation vs. 2n7001t solution a data input = 1.8v b data output = 3.3v sot23 fet discrete translator: four component, push-pull translation w/o esd protection 2n7001t: single small footprint device, low power translation with esd protection v cca v ccb b gnd a dpw package dck package solution size: ~ 60mm 2 0603 res. sot23 fet sot23 fet b v cca v ccb gnd a 1 2 3 5 4 solution size: 0.64mm 2 solution size: 4.2mm 2 advance information
13 2n7001t www.ti.com sces888 ? may 2018 product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 10 power supply recommendations the 2n7001t device uses two separate configurable power-supply rails, v cca and v ccb . the v cca and v ccb power-supply rails accept any supply voltage that range from 1.65 v to 3.6 v. the a input and b output are referenced to v cca and v ccb respectively allowing up or down translation among the 1.8-v, 2.5-v, and 3.3-v voltage nodes. a 0.1 f bypass capacitor is recommended on all v cc pins. always apply a ground reference to the gnd pin first. however, there are no additional requirement for power supply sequencing. 11 layout 11.1 layout guidelines to ensure reliability of the device, follow the common printed-circuit board layout guidelines listed below: ? use bypass capacitors on power supplies. ? use short trace lengths to avoid excessive loading. an example layout is given in figure 13 for the dpw (x2son-5) package. this example layout includes two 0402 (metric) capacitors, and uses the measurements that are in the package outline drawing appended to the end of this datasheet. a via of diameter 0.1 mm (3.973 mil) is placed directly in the center of the device. this via can be used to trace out the center pin connection through another board layer, or the via can be left out of the layout. 11.2 layout example figure 13. example layout for the dpw (x2son-5) package advance information solder mask opening, typ metal under solder mask, typ 8 mil 4 mil 8 mil 0402 0.1 ? f bypass capacitor 8 mil 4 mil 0402 0.1 ? f bypass capacitor 8 mil v cca b a v ccb gnd
14 2n7001t sces888 ? may 2018 www.ti.com product folder links: 2n7001t submit documentation feedback copyright ? 2018, texas instruments incorporated 12 device and documentation support 12.1 documentation support 12.1.1 related documentation for related documentation see the following: ? texas instruments, implications of slow or floating cmos inputs application report ? texas instruments, designing and manufacturing with ti ' s x2son packages application report 12.2 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 12.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.4 trademarks e2e is a trademark of texas instruments. 12.5 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 13 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. advance information
package option addendum www.ti.com 9-jun-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 2n7001tdckr preview sc70 dck 5 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 2n7001tdpwr preview x2son dpw 5 3000 green (rohs & no sb/br) cu nipdauag level-1-260c-unlim -40 to 125 dp P2N7001TDCKR active sc70 dck 5 3000 tbd call ti call ti -40 to 125 p2n7001tdpwr active x2son dpw 5 3000 tbd call ti call ti -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and
package option addendum www.ti.com 9-jun-2018 addendum-page 2 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.

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as is ? and with all faults. ti disclaims all other warranties or representations, express or implied, regarding resources or use thereof, including but not limited to accuracy or completeness, title, any epidemic failure warranty and any implied warranties of merchantability, fitness for a particular purpose, and non-infringement of any third party intellectual property rights. ti shall not be liable for and shall not defend or indemnify designer against any claim, including but not limited to any infringement claim that relates to or is based on any combination of products even if described in ti resources or otherwise. in no event shall ti be liable for any actual, direct, special, collateral, indirect, punitive, incidental, consequential or exemplary damages in connection with or arising out of ti resources or use thereof, and regardless of whether ti has been advised of the possibility of such damages. unless ti has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., iso/ts 16949 and iso 26262), ti is not responsible for any failure to meet such industry standard requirements. where ti specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. using products in an application does not by itself establish any safety features in the application. designers must ensure compliance with safety-related requirements and standards applicable to their applications. designer may not use any ti products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). such equipment includes, without limitation, all medical devices identified by the u.s. food and drug administration as class iii devices and equivalent classifications outside the u.s. ti may expressly designate certain products as completing a particular qualification (e.g., q100, military grade, or enhanced product). designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at designers ? own risk. designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. designer will fully indemnify ti and its representatives against any damages, costs, losses, and/or liabilities arising out of designer ? s non- compliance with the terms and provisions of this notice. mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2018, texas instruments incorporated

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